Back to the basics

Computers were not always a binary world. Though information is now processed in the binary of zeros and ones, before the system learned to do so, another mechanism existed, one that was probably more versatile but less efficient. Analogue computers — precursors to the modern digital computer — relied on physical quantities such as voltages and currents to perform mathematical operations. But they were thoroughly overridden by the more precise and reliable digital computers in the 1980s. Now, nearly half a century later, as computing further metamorphoses with artificial intelligence (AI), there is renewed interest in the system that set the ball rolling in the first place. The potential of analogue computing as an efficient hardware platform for AI is finding takers. 

"Turns out that analogue is great for in-memory computing because of how area-efficient and energy-efficient it is," says Naveen Verma, Professor of Electrical and Computer Engineering at Princeton University. Digital AI chips, on the other hand, spend a lot of time moving data between memory and processing units, impacting efficiency.  

But what if, instead of bringing data to a separate processor, calculations were performed within the memory units where data are stored? Engineers and researchers looking for solutions found themselves circling back to analogue. Verma studied analogue circuits for years before co-founding the semiconductor start-up EnCharge. Along with Mythic, Sagence AI and Aspinity, Verma's company is part of a niche community across the U.S. and India which uses analogue chips to make AI inferencing faster. The companies need massive capital investments to power through, but challenging the digital status quo has not been easy.

At the heart of AI operations is matrix multiplication. Each input datum is assigned a certain weight, and large grids of values are multiplied and added to produce the output. Multiplier operations in digital computers are performed by a combination of different logic gates such as 'AND', 'OR', and 'NOT'. Analogue computers primarily depend on two laws of physics to perform these operations: Kirchhoff's Law, which states that the total current flowing into a node must equal the total current flowing out of it; and Ohm's Law, in which multiplying voltage by conductance determines the current.

Companies such as Mythic use non-volatile memory units (NVM) to retain stored data even when power is removed. Weights, encoded as conductance, are held inside the NVMs. The digital input array is converted to analogue voltages, and is multiplied by the weights to give current values as outputs in accordance with Ohm's Law. The resulting currents are added in keeping with Kirchhoff's Law, and the sum is then converted into a digital number, and given out to the rest of the computation.  

"In classic GPUs (graphics processing unit), the weights are fetched again and again from the DRAMs (Dynamic Random-Access Memory units), which causes a lot of power consumption. It also increases the thermal envelope of the overall system," Manoj Kumar, India head of Mythic, explains the energy efficiency of analogue architecture.

In-memory computation, however, can be performed digitally as well: companies such as the California-based d-Matrix already offer this technology by putting large digital logic-based adders inside the memory to perform computations there. Verma, however, challenges the method's area efficiency. "Typical reports from leading researchers in the field show that 90% of the memory area is taken over by digital adders. So, it doesn't look like memory anymore. It just looks like a standard digital computing engine," he says.

Analogue computing is best suited for AI inference and edge applications that run small models. Mythic's first generation of chips is used in vision, automotive, and robotic tools. Training AI models needs billions of parameters, and analogue chips can support only about 80 million of those. "If we want to expand our technology to larger, more generic LLMs (large language models) and other transformer-based models, we need more chips talking to each other," says Kumar. The company is working on advanced packaging for its second-generation chips. "We'll be creating a small chiplet. We can put multiple chips on one substrate and workload can be divided across them," he says. 

The analogue resurgence is part of industry-wide efforts to shift away from the power-hungry nature of GPU-dominant architecture while performing AI inferencing applications. Google, for instance, has its TPUs (tensor processing units), while AI infrastructure company Cerebras is investing in wafer-scale computing with one gigantic accelerator containing large numbers of compute elements and memory on one piece of silicon. In India, many edge applications involving local data processing are being solved by central processing units (CPUs) alone.  

"GPUs are not very energy efficient," says G.S. Madhusudan, co-founder of InCore Semiconductors, a Chennai-based start-up building customised processors based on RISC-V (Reduced Instruction Set Computer Five) architecture. "When it comes to inference and agentic type of workloads, it makes more sense to use specialised accelerators and here's where we are seeing CPUs coming back to prominence."  

Neural computation engineer Naveen Rao started Unconventional AI in December 2025 to explore low-power alternatives and edge inference requirements. The company gives grants to groups working on alternative ways to remove computational and latency bottlenecks in AI. The goal, says Rao, is to bring biology-scale efficiency to AI, and going analogue is one way to do it, he believes.

A major challenge in analogue computing is its susceptibility to temperature-induced noise. Digital circuits enforce signals into zeroes and ones. With 200 billion transistors on a chip, that kind of signal separation is advantageous. "But that also removes a lot of efficiency. There are all sorts of signal levels in between that we are not properly representing," says Verma. Analogue circuits could recapture this efficiency if they can manage the noise, a breakthrough which Verma and his team managed at their Princeton lab.

Verma chose not to rely on current flowing through transistors to compute output values. "Semiconductors are messy. They depend on temperature and material parameters which are difficult to keep consistent across different devices," he says. He zeroed in on capacitors instead; they were inexpensive and not dependent on temperature or material parameters. Current flowing through them depends only on the space between wires. "Turns out geometry is one thing we can control very well in CMOS processes (the most prominent technology used to build microchips today). This geometric control is why we can build five- or three- or even two-nanometre transistors today," says Verma.  

He employs a switched-capacitor operation technique: a capacitor temporarily stores electric charge, and switches it between different circuit nodes to perform operations such as multiplication, addition, or filtering. "What's interesting is that this approach — using capacitors the exact way we do — has been done for decades. The innovation here is really just in taking those approaches and, rather than using them for, say, analogue-to-digital converters, figuring out how to use them for in-memory computing for AI applications," says Verma. 

In 2025, EnCharge released its chip EN100, which was initially designed for edge and on-premises computing. The team is now working to improve its power efficiency and collaborating with data centre partners to run bigger workloads on it. The company is expanding and looking to build an engineering team in India. "Talent is a critical part of any AI company's strategy, and India has a very distinct advantage across different disciplines of engineering that are crucial for chip design," he says.